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CDCE6214-Q1

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Ultra-low power clock generator supporting PCIe gen 1-5 with 2 inputs, 4 outputs and internal EEPROM

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Data sheet

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NEW CDCE6214Q1TM ACTIVE Ultra-low power clock generator supporting PCIe® gen 1-5 with active low output enable Internal design metal change for outputs to be enabled low internally.

CDCE6214-Q1

ACTIVE
Data sheet Order now

Product details

Function Clock generator Number of outputs 4 Output frequency (max) (MHz) 328.125 Core supply voltage (V) 1.8, 2.5, 3.3 Output supply voltage (V) 1.8, 2.5, 3.3 Input type Differential, LVCMOS, XTAL Output type HCSL, LVCMOS, LVDS Operating temperature range (°C) -40 to 105 TI functional safety category Functional Safety-Capable Features Integrated EEPROM, Pin programmable, Serial interface Rating Automotive
Function Clock generator Number of outputs 4 Output frequency (max) (MHz) 328.125 Core supply voltage (V) 1.8, 2.5, 3.3 Output supply voltage (V) 1.8, 2.5, 3.3 Input type Differential, LVCMOS, XTAL Output type HCSL, LVCMOS, LVDS Operating temperature range (°C) -40 to 105 TI functional safety category Functional Safety-Capable Features Integrated EEPROM, Pin programmable, Serial interface Rating Automotive
VQFN (RGE) 24 16 mm² 4 x 4
  • AEC-Q100 qualified for automotive applications
    • Temperature grade 2: –40°C to +105°C
  • Functional Safety-Capable
    • Documentation available to aid functional safety system design
  • Configurable high performance, low-power, frac-N PLL with RMS jitter with spurs (12 kHz – 20 MHz, Fout > 100 MHz) as:
    • Integer mode:
      • Differential output: 350 fs typical, 600 fs maximum
      • LVCMOS output: 1.05 ps typical, 1.5 ps maximum
    • Fractional mode:
      • Differential output: 1.7 ps typical, 2.1 ps maximum
      • LVCMOS output: 2.0 ps typical, 4.0 ps maximum
  • Supports PCIe Gen1/2/3/4 with SSC and Gen 1/2/3/4/5 without SSC
  • 2.335-GHz to 2.625-GHz internal VCO
  • Typical power consumption: 65 mA for 4-output channel, 23 mA for 1-output channel.
  • Universal clock input, two reference inputs for redundancy
    • Differential AC-coupled or LVCMOS: 10 MHz to 200 MHz
    • Crystal: 10 MHz to 50 MHz
  • Flexible output clock distribution
    • 4 channel dividers: Up to 5 unique output frequencies from 24 kHz to 328.125 MHz
    • Combination of LVDS-like, LP-HCSL or LVCMOS outputs on OUT0 – OUT4 pins
    • Glitchless output divider switching and output channel synchronization
    • Individual output enable through GPIO and register
  • Frequency margining options
    • DCO mode: frequency increment/decrement with 10ppb or less step-size
  • Fully-integrated, configurable loop bandwidth: 100 kHz to 1.6 MHz
  • Single or mixed supply for level translation: 1.8 V/2.5 V/3.3 V
  • Configurable GPIOs and flexible configuration options
    • I2C-compatible interface: up to 400 kHz
    • Integrated EEPROM with two pages and external select pin. In-situ programming allowed.
  • Supports 100-Ω systems
  • Low electromagnetic emissions
  • Small footprint: 24-pin VQFN (4 mm × 4 mm)
  • AEC-Q100 qualified for automotive applications
    • Temperature grade 2: –40°C to +105°C
  • Functional Safety-Capable
    • Documentation available to aid functional safety system design
  • Configurable high performance, low-power, frac-N PLL with RMS jitter with spurs (12 kHz – 20 MHz, Fout > 100 MHz) as:
    • Integer mode:
      • Differential output: 350 fs typical, 600 fs maximum
      • LVCMOS output: 1.05 ps typical, 1.5 ps maximum
    • Fractional mode:
      • Differential output: 1.7 ps typical, 2.1 ps maximum
      • LVCMOS output: 2.0 ps typical, 4.0 ps maximum
  • Supports PCIe Gen1/2/3/4 with SSC and Gen 1/2/3/4/5 without SSC
  • 2.335-GHz to 2.625-GHz internal VCO
  • Typical power consumption: 65 mA for 4-output channel, 23 mA for 1-output channel.
  • Universal clock input, two reference inputs for redundancy
    • Differential AC-coupled or LVCMOS: 10 MHz to 200 MHz
    • Crystal: 10 MHz to 50 MHz
  • Flexible output clock distribution
    • 4 channel dividers: Up to 5 unique output frequencies from 24 kHz to 328.125 MHz
    • Combination of LVDS-like, LP-HCSL or LVCMOS outputs on OUT0 – OUT4 pins
    • Glitchless output divider switching and output channel synchronization
    • Individual output enable through GPIO and register
  • Frequency margining options
    • DCO mode: frequency increment/decrement with 10ppb or less step-size
  • Fully-integrated, configurable loop bandwidth: 100 kHz to 1.6 MHz
  • Single or mixed supply for level translation: 1.8 V/2.5 V/3.3 V
  • Configurable GPIOs and flexible configuration options
    • I2C-compatible interface: up to 400 kHz
    • Integrated EEPROM with two pages and external select pin. In-situ programming allowed.
  • Supports 100-Ω systems
  • Low electromagnetic emissions
  • Small footprint: 24-pin VQFN (4 mm × 4 mm)

The CDCE6214-Q1 is a four-channel, ultra-low power, medium grade jitter, clock generator for automotive application that can generate five independent clock outputs selectable between various modes of drivers. The input source could be a single-ended or differential input clock source, or a crystal. The CDCE6214-Q1 features a frac-N PLL to synthesize unrelated base frequency from any input frequency. The CDCE6214-Q1 can be configured through the I2C interface. In the absence of the serial interface, the GPIO pins can be used in Pin Mode to configure the product into distinctive configurations.

The CDCE6214-Q1 is a four-channel, ultra-low power, medium grade jitter, clock generator for automotive application that can generate five independent clock outputs selectable between various modes of drivers. The input source could be a single-ended or differential input clock source, or a crystal. The CDCE6214-Q1 features a frac-N PLL to synthesize unrelated base frequency from any input frequency. The CDCE6214-Q1 can be configured through the I2C interface. In the absence of the serial interface, the GPIO pins can be used in Pin Mode to configure the product into distinctive configurations.
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Technical documentation

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Type Title Date
* Data sheet CDCE6214-Q1 Ultra-Low Power Clock Generator With One PLL, Four Differential Outputs, Two Inputs, and Internal EEPROM datasheet (Rev. B) PDF | HTML 14 Oct 2021
Application note Clocking for PCIe Applications PDF | HTML 28 Nov 2023
Functional safety information CDCE6214-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA PDF | HTML 15 Apr 2021
Technical article Optimizing eAVB for automotive applications using clock generators PDF | HTML 08 May 2020
Certificate CDCE6214-Q1EVM Declaration of Conformity (DoC) 28 Apr 2020
Application note Frequency Margining and eAVB System Design With CDCE6214-Q1 PDF | HTML 02 Apr 2020
Application note CDCE6214-Q1 Crystal-Based Oscillator Design 09 Dec 2019
EVM User's guide CDCE6214-Q1 EVM User's Guide (Rev. A) 27 Nov 2019
User guide CDCE6214-Q1 Registers (Rev. B) 27 Nov 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

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Evaluation board

CDCE6214-Q1EVM — 4 differential and 1 LVCMOS outputs clock generator evaluation module

The CDCE6214-Q1 evalution module (EVM) is an evaluation platform for the CDCE6214-Q1 ultra-low power clock generator. This
evaluation module provides an USB-based interface to access the I2C bus to communicate with the CDCE6214-Q1. Pin control mode can set the device in a specific operation
User guide: PDF
Not available on TI.com
Support software

TICSPRO-SW — TICS Pro v1.7.7.2, 05-Feb-2024

Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.

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Supported products & hardware

Supported products & hardware

Products
Clock generators
CDCE6214-Q1 — Ultra-low power clock generator supporting PCIe gen 1-5 with 2 inputs, 4 outputs and internal EEPROM CDCI6214 — PCIe Gen4 support ultra-low power clock generator with four programmable outputs & EEPROM LMK02000 — 1 to 800-MHz, precision clock distributor with integrated PLL and 3 LVDS / 5 LVPECL outputs LMK02002 — 1 to 800-MHz, precision clock distributor with integrated PLL and 4 LVPECL outputs LMK03200 — Precision 0-delay clock conditioner with integrated VCO LMK03318 — Ultra-low jitter clock generator family with single PLL LMK03328 — Ultra-low jitter clock generator family with two independent PLLs LMK03806 — Ultra-low jitter clock generator with 14 outputs LMK3H0102 — Bulk acoustic wave (BAW)-based PCIe Gen 1 to Gen 6-compliant referenceless clock generator
RF PLLs & synthesizers
LMX1204 — 12.8-GHz RF buffer, multiplier and divider with JESD204B/C SYSREF support and phase synchronization LMX2485 — 500-MHz to 3-GHz delta-sigma low power dual PLL for RF personal communications LMX2485E — 50-MHz to 3-GHz delta-sigma low power dual PLL for RF personal communications LMX2485Q-Q1 — 500MHz to 3GHz automotive delta-sigma low power dual PLL LMX2486 — 1-GHz to 4.5-GHz delta-sigma low power dual PLL for RF personal communications LMX2487 — 1 to 6-GHz delta-sigma low power dual PLLatinum frequency synthesizer with 3.0-GHz integer PLL LMX2487E — 3-GHz to 7.5-GHz delta-sigma low power dual PLL for RF personal communications LMX2491 — 6.4-GHz low noise fractional-N PLL with ramp/chirp generation LMX2492 — 500MHz to 14GHz wideband, low noise fractional-N PLL with ramp/chirp generation LMX2492-Q1 — Automotive grade 500-MHz to 14-GHz wideband, low noise fractional-N PLL with ramp/chirp generation LMX2531 — High performance frequency synthesizer system with integrated VCO LMX2541 — Ultra-low noise PLLatinum frequency synthesizer with integrated VCO LMX2571 — 1.34-GHz, low-power, extreme-temperature RF synthesizer with frequency-shift keying (FSK) modulation LMX2571-EP — Enhanced-product, 1.34-GHz, low-power, extreme-temperature RF synthesizer with FSK modulation LMX2572 — 6.4-GHz low-power wideband RF synthesizer LMX2572LP — 2-GHz low power wideband RF synthesizer with FSK modulation LMX2581 — 3.76-GHz wideband frequency synthesizer with integrated VCO LMX2581E — 3.8-GHz wideband frequency synthesizer with integrated VCO LMX2582 — 5.5-GHz high performance, wideband PLLatinum RF synthesizer LMX2592 — 9.8-GHz wideband frequency synthesizer with integrated VCO LMX2594 — 15-GHz wideband PLLatinum™ RF synthesizer with phase synchronization and JESD204B support LMX2595 — 20-GHz wideband RF synthesizer with phase synchronization & JESD204B support LMX2820 — 22.6-GHz wideband RF synthesizer with phase synchronization, JESD and <5-µs frequency calibration LMX1214 — 1:5 16GHz RF buffer and divider with auxiliary clock LMX1906-SP — Radiation-hardness-assured (RHA) 15GHz buffer, multiplier and divider with SYSREF and FPGA clock
Clock jitter cleaners & synchronizers
LMK04100 — Precision clock conditioners clock jitter cleaner with cascaded PLLs LMK04101 — Jitter cleaner with integrated 1430 to 1570-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS LMK04102 — Jitter cleaner with integrated 1600 to 1750-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS LMK04110 — Jitter cleaner with integrated 1185 to 1296-MHz VCO:5 outputs for 2VPEC/LVPEC LMK04111 — Jitter cleaner with integrated 1430 to 1570-MHz VCO:5 outputs for 2VPEC/LVPEC LMK04131 — Jitter cleaner with integrated 1430 to 1570-MHz VCO:2 outputs for 2VPEC/LVPEC+LVDS+LVCOMS LMK04133 — Jitter cleaner with integrated 1840 to 2160-MHz VCO:2 outputs for 2VPEC/LVPEC+LVDS+LVCOMS LMK04208 — Ultra low-noise clock jitter cleaner with 6 programmable outputs LMK04228 — Ultra low-noise clock jitter cleaner with dual loop PLLs LMK04610 — Ultra low-noise and low power JESD204B compliant clock jitter cleaner with dual PLLs LMK04616 — Ultra low-noise and low power JESD204B compliant clock jitter cleaner LMK04803 — Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 1.9-GHz VCO LMK04816 — Three input low-noise clock jitter cleaner with dual loop PLLs LMK04821 — Ultra low jitter synthesizer and jitter cleaner with JESD204B support LMK04826 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 1840 to1970-MHz VCO0 LMK04828 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0. LMK04828-EP — Ultra low-noise JESD204B compliant clock jitter cleaner with temperature range -55 to 105c LMK04832 — Ultra-low-noise, 3.2-GHz, 15-output, JESD204B clock jitter cleaner with dual loop LMK04832-SEP — Radiation-tolerant, 30-krad, ultra-low-noise, 3.2-GHz 15-output JESD204C clock jitter cleaner LMK04832-SP — Radiation-hardened-assured (RHA), ultra-low-noise, 3.2-GHz, 15-output clock jitter cleaner LMK05028 — Low-jitter dual-channel network synchronizer clock LMK05318 — Ultra-low jitter single channel network synchronizer clock with BAW LMK05318B — Ultra-low jitter single channel network synchronizer clock with BAW LMK5B12204 — Ultra-low jitter clock generator with network synchronization and BAW technology LMK5B33216 — 16-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO LMK5B33414 — 14-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO LMK5C33216 — Ultra-low jitter clock synchronizer with JESD204B for wireless communications with BAW LMK04368-EP — Enhanced product ultra-low-noise 3.2-GHz JESD204C jitter cleaner LMK04714-Q1 — Automotive, ultra low-noise 3.2-GHz, JESD204B and JESD204C dual-loop clock jitter cleaner LMK5C33216A — Three DPLL, three APLL, two-input and 16-output network synchronizer with JESD204B/C and BAW VCO
Clock buffers
CDCDB800 — 8-output clock buffer for PCIe® Gen 1 to Gen 6 LMK01000 — 1.6-GHz high performance clock buffer, divider, and distributor with 3 LVDS & 5 LVPECL outputs LMK01010 — 1.6-GHz high performance clock buffer, divider, and distributor with 8 LVDS outputs LMK01020 — 1.6-GHz high performance clock buffer, divider, and distributor with 8 LVPECL outputs LMK01801 — Dual clock distribution LMK1D1208I — 8-channel output, 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I²C CDCDB2000 — DB2000QL compliant 20-output clock buffer for PCIe® Gen 1 to Gen 5 LMKDB1108 — 8-output LP-HCSL clock buffer for PCIe Gen 1 to Gen 6 LMKDB1120 — DB2000QL-compliant 20-output clock buffer for PCIe Gen 1 to Gen 6
Oscillators
LMK61E0M — LVCMOS ultra-low jitter programmable oscillator with internal EEPROM LMK61E2 — 156.250-MHz, ±50 ppm, ultra-low jitter, integrated EEPROM, fully programmable oscillator
Hardware development
Evaluation board
LMK03806BEVAL — LMK03806B Evaluation Board LMK04208EVM — Two Input, 6+1 Output, Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.9 GHz VCO LMK04616EVM — LMK04616 Evaluation Module LMK04803BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 1.9 GHz VCO LMK04805BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.2 GHz VCO LMK04806BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.5 GHz VCO LMK04808BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.9 GHz VCO LMK04816BEVAL — Three Input, Thirteen Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VC LMK04826BEVM — LMK04826BEVM Evaluation Module LMK04828BEVM — LMK04828 evaluation module LMK04832EVM — LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module LMK04832SEPEVM — LMK04832-SEP evaluation module for ultra-low-noise, 3.2-GHz 15-output clock jitter clea LMK04906BEVAL — Three Input, Seven Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VCO LMK5B33216EVM — LMK5B33216 evaluation module for 16-output, three DPLL and APLL, network synchronizer with BAW VCO LMX2571EPEVM — LMX2571-EP evaluation module for 1.34-GHz, low-power, extreme-temperature RF synthesizer LMX2582EVM — LMX2582EVM High Performance, Wideband Frequency PLLatinum RF Synthesizer With Integrated VCO LMX2592EVM — LMX2592EVM high-performance, wideband frequency RF synthesizer PLLATINUM™ integrated circuit LMX2594PSEVM — LMX2594 evaluation module for 15-GHz RF synthesizer with multiple-device phase synchronization XMICR-3P-LMX2492 — LMX2492 X-MWblock evaluation modules XMICR-3P-LMX2572 — LMX2572 X-MWblock evaluation modules XMICR-3P-LMX2592 — LMX2592 X-MWblock evaluation modules XMICR-3P-LMX2594 — LMX2594 X-MWblock evaluation modules XMICR-3P-LMX2595 — LMX2595 X-MWblock evaluation modules LMK04832EVM-CVAL — LMK04832-SP evaluation module for ultra-low-noise, dual-loop, JESD204B clock jitter cleaner LMK04368EPEVM — LMK04368-EP evaluation module for JESD204B/C dual-loop clock jitter cleaner LMK61E0MEVM — LMK61E0M Ultra-Low-Jitter Programmabler Oscillator Evaluation Module LMK61E2EVM — LMK61E2EVM Ultra-Low-Jitter Programmable Oscillator Evaluation Module LMX1204EVM — LMX1204 evaluation module for RF buffer, multiplier and divider with JESD204B/C SYSREF support LMX2594EVM — LMX2594EVM 15-GHz wideband RF synthesizer with phase synchronization & JESD204B evaluation module LMX2595EVM — 20-GHz Wideband RF Synthesizer With Phase Synchronization and JESD204B Evaluation Module LMX2615EVM-CVAL — Space grade synthesizer evaluation module LMX2694EPEVM — 15-GHz wideband RF synthesizer evaluation module LMX2572EVM — 6.4-GHz Low Power Wideband RF Synthesizer with Phase Synchronization and JESD204B Support LMX2572LPEVM — 2-GHz Low Power Wideband RF Synthesizer with FSK Modulation Evaluation Module LMX2581EVM — LMX2581 evaluation module LMX2820EVM — LMX2820 22.6-GHz wideband RF synthesizer evaluation module LMX8410LEVM — I/Q demodulator evaluation module LMK5B33414EVM — LMK5B33414 evaluation module for 14-output, three DPLL and APLL, network synchronizer with BAW VCO LMK5C33216EVM — LMK5C33216 clock synchronizer DPLL 2 input 16 outputs evaluation module LMK05028EVM — LMK05028 Network Clock Generator and Synchronizer Evaluation Module LMK05318BEVM — Network synchronizer clock evaluation module CDCI6214EVM — CDCI6214 Ultra-Low Power Clock Generator Evaluation Module CDCE6214-Q1EVM — 4 differential and 1 LVCMOS outputs clock generator evaluation module LMK3H0102EVM — LMK3H0102 evaluation module
Software
IDE, configuration, compiler or debugger
CODELOADER — CodeLoader Software for device register programming
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Simulation model

CDCE6214-Q1 IBIS Model

SNAM233.ZIP (251 KB) - IBIS Model
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Design tool

CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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